With the spread of digital television broadcasting, most receivers (so-called televisions) have turned to be provided with a digital processing circuit. In addition, recording devices (so-called video cassette recorders) and video games have conventionally been connected through analog lines, while digital lines are employed increasingly to connect these devices with televisions. Further, as so-called digital household electrical appliances such as DVD players, digital video cameras, and mobile phones are coming along, the kinds of devices to be connected with the television are greatly increased.
For example, in a television that receives conventional common digital television broadcasts, as schematically shown in FIG. 9, receipt of a program desired by a user can be performed through one processing line, i.e., selecting one of plural multiplexed signals which are transmitted from respective broadcasting stations and received via an antenna (not shown), by means of a tuner 71, demodulating the selected signal in a demodulation circuit 72, demultiplexing the signal obtained in this demodulation in a demultiplexer circuit 73, selecting one program from the signal obtained by the demodulation, and then converting the selected program into analog images in an AV decoder 74 to be displayed on the television screen.
However, when a large number of the digital household electrical appliances are connected to the television, plural data processings: outputting one of received broadcast programs to a video cassette recorder or the like to be recorded therein while playing back video signals which are inputted from a DVD player, are required in the conventional television as shown in FIG. 9. In this case, the demultiplexer circuit 73 is required to process two kinds of data. Further, when an apparatus which can carry out an input processing and an output processing simultaneously, like a hard disk recording device is connected, the demultiplexer circuit is required to simultaneously process three or more kinds of data.
Therefore, the need for a demultiplexer circuit which can demultiplex plural multiplexed input signals has arisen.
An example of the conventional demultiplexer circuit is described in Japanese Published Patent Application No. 2000-156705. This demultiplexer circuit includes only a demultiplexing function corresponding to one kind of data. On the other hand, an example of a demultiplexer circuit that processes plural kinds of data is described in Japanese Published Patent Application No. 2000-86064. This demultiplexer circuit has plural demultiplexers in parallel, by a number corresponding to the number of kinds of inputted data, to carry out plural data processings. Therefore, this conventional demultiplexer circuit is required to have three demultiplexers when it is required to process three kinds of input data, and four demultiplexers when it is required to process four kinds of input data.
In this demultiplexer circuit which includes plural demultiplexers each demultiplexing one multiplexed data input, by a number corresponding to the number of the input data, the demultiplexing process is easily carried out because the respective demultiplexers are independent from each other, while the circuit scale is unfavorably increased because plural circuits having the same structures are included. Further, it is required that memories which stores conditions for the demultiplexing process should be included respectively in each of the circuits, whereby the circuit scale is increased, and the efficiency in use is adversely decreased.
In recent years, such a demultiplexer circuit is integrated on one LSI together with other circuits, while the increase in the circuit scale of the demultiplexer circuit results in an increase in the costs of the LSI containing the multiplexer circuit. Further, such a demultiplexer circuit is undesirable also from the viewpoint of power saving. Therefore, a demultiplexer circuit that has a minimum circuit scale, and can simultaneously process various kinds of multiplexed data is demanded.